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OS and Architecture Overview

Operating System

  • Software (!= Application Program)
  • Resource Manager / Allocator
  • Control User Program

Review: Architecture - CA1

  • Device Controller
    • Have Local Buffer Storage & Register
      • Data movement / exchange
    • Device Driver
      • Understand the function
      • Provide uniform interface -> interact with CPU (through interrupt)

Async Interaction!!!

Decide Cycle order!!!

Computer System Organization

  • I/O devices and the CPU can execute concurrently
  • Each device controller is in charge of a particular device type
  • Each device controller has a local buffer
  • Each device controller type has an operating system device driver to manage it
  • CPU moves data from/to main memory to/from local buffers
  • I/O is from the device to local buffer of controller
  • Device controller informs CPU that it has finished its operation by causing an interrupt

Common Functions of Interrupts

  • Interrupt transfers control to the interrupt service routine generally, through the interrupt vector 中断向量表, which contains the addresses of all the service routines
  • Interrupt architecture must save the address of the interrupted instruction
  • A trap or exception is a software-generated interrupt caused either by an error or a user request
    • Error -> Exception
    • User request -> Trap
    • Will review at SysRq
  • An operating system is interrupt driven
    • 4 kinds of interrupt
如何理解 An operating system is interrupt driven

理解“操作系统是中断驱动的”通常意味着操作系统使用中断作为主要机制来处理外部事件和系统调用。这意味着当外部事件（如设备完成传输、用户输入等）发生时，操作系统通过中断请求来通知处理器停止当前执行的任务，并跳转到相应的中断处理程序来处理这些事件。

下面是关于操作系统是中断驱动的几个要点：

  1. 中断处理：操作系统使用中断处理来响应外部事件，而不是持续轮询或等待事件发生。这样可以有效利用处理器的时间，使其在等待事件发生期间可以执行其他任务。

  2. 异步事件处理：中断使操作系统能够异步地处理事件，而无需不断地监视事件发生。这有助于提高系统的效率和响应能力。

  3. 多任务处理：通过中断处理，操作系统可以支持多个任务并行执行，因为可以通过中断机制及时响应不同任务的需求。

  4. 实时响应：中断驱动使操作系统能够快速响应外部事件，对于实时系统和需要快速处理事件的应用程序非常重要。

  5. 资源管理：中断还可以帮助操作系统管理硬件资源，例如设备和内存。通过中断处理程序，操作系统可以控制硬件设备的访问和数据传输，确保资源被正确分配和使用。

总的来说，基于中断的驱动方式使得操作系统能够更高效地处理外部事件、实现多任务处理、快速响应要求，并提供更好的资源管理和系统稳定性。

Pasted image 20240227155646 An Example of Von Neuman Architecture

  • DMA: Direct Memory Access
  • CPU CANNOT ACCESS Disk / External Devices
  • CPU Can Access
    • Register
    • Cache
    • Memory

Storage Device Hierarchy

Pasted image 20240227160117

  • Primary Storage (Lost when power off) CPU can access
    • Registers
    • Cache
    • Main Memory
  • Secondary Storage
    • 1
    • 2
  • 3rd
    • 1
    • 2

Performance of various levels of storage

  • Level ++
  • Size --
  • Access time ++
  • Bandwidth --
  • Different Manager

Caching

  • Important principle, performed at many levels in a computer (in hardware, operating system, software)
  • Information in use copied from slower to faster storage temporarily
  • Faster storage (cache) checked first to determine if information is there
    • If it is, information used directly from the cache (fast)
    • If not, data copied to cache and used there
  • Cache smaller than storage being cached
    • Cache management important design problem
    • Cache size and replacement policy
  • Why does cache work?
    • Temporal Locality: a program is likely to access data it has just recently accessed
      • Loop
    • Spatial Locality: a program is likely to access data that are close to what have just been accessed
      • Array
  • Requires a cache management policy
  • Caching introduces another level in storage hierarchy.
    • This requires data that is simultaneously stored in more than one level to be consistent
      • For data in different layers

Suppose each cache access takes 2 ns and each

memory (i.e., RAM) access takes 200 ns. What is the minimum cache hit ratio we need in order to achieve no more than 20ns average memory access time?

Let \(p\) denote hit ratio, the average memory access time is
\(p* 2 + (1-p)*202 < 20\)

  • \(p\) means the possibility to hit at cache
  • \(1-p\) means the possibility to hit at memory (cache miss)

Data transfer on the bus

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Cache-memory: cache misses, write-through/write-back Memory-disk: swapping, paging, file accesses Memory-NIC: packet send/receive I/O devices to the processor: interrupts (DMA completion, packet arrival)

DMA / Direct Memory Access

  • Bulk data transfer memory <-> l/O device (disk, network interface) initiated by processor without the need of CPU
    • address of I/O device
    • starting location in memory
    • number of bytes
  • direction of transfer (read/write from/to memory)
  • Processor interrupted when operation completes
  • Bus arbitration between cache-memory and DMA transfers
  • Memory cache must be consistent with DMA

Back to OS

\[ \begin{gathered} \text { application (user) } \\ \hline \text { operating system } \\ \hline \text { hardware } \end{gathered} \]
  • A software layer
    • between hardware and application programs/users,
    • provides a virtual machine interface
      • easy to use (hides complexity)
      • safe (prevents and handles errors)
  • Acts as resource manager
    • allows programs/users to share hardware resources
    • in a protected way: fair and efficient
  • Bootstrap Program
  • In firmware
  • Launch when Boot
  • Bootstrap Initialize OS & OS Load Data -> Kernel -> Memory

Resource? Also with process management (广义的概念)

How does OS work?

Pasted image 20240227162717

  • System calls: OS receives requests from the application
  • Commands: OS Issues commands to hardware
  • Interrupts: OS handles hardware interrupts
  • Upcalls: OS calls back the application

OS seat quietely when free

Different from HARDWARE INTERRUPT

Trap: Generated by software - Error - User Request

System Calls

  • System calls provide the interface between a running program and the operating system
    • Generally available as assembly-language instructions
    • Languages defined to replace assembly language for systems programming allow system calls to be made directly (e.g., C, C++)
  • Three general methods are used to pass parameters between a running program and the operating system
    • Pass parameters in registers
      • Can be accessed by Running Program / OS
    • Store the parameters in a table in memory, and the table address is passed as a parameter in a register
    • Push (store) the parameters onto the stack by the program, and pop off the stack by operating system
  • Typically, a number associated with each system call
    • Note: In linux, every call has an ID to recogonize the type
    • System-call interface maintains a table indexed according to these numbers

Passing of Parameters As A Table

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  • Advantage
    • Fase
  • Disadvantage
    • Small & Expensive

=> Cache store Address => Access at Block / Table

  • 5 or fewer paras: register
  • more: address / stack

Hardware Protection

  • Dual-Mode Operation: Distinguish OS / User Program Ops (Authorization)
  • I/O Protection (Previleage Op)
  • Memory Protection (Certain process access certain address)
  • CPU Protection (Certain duration, Certain process)

Dual-Mode Operation

  • OS must provide hardware support to differentiate between at least two modes of operations
    1. User mode - execution done on behalf of a user
    2. Kernel/monitor mode - execution done on behalf of operating system
  • Mode bit added to computer hardware to indicate the current mode:
    kernel (0) or user (1)
    • Boot(Kernel Mode) => Start Application(User Mode)
  • When an interrupt or fault occurs hardware switches to kernel mode
  • Previleged instructions: can only be executed in kernel mode
    • Eg. File I/O, Interrupt management, Switching mode to K mode ...

../res/Pasted image 20240229152431.png

Two mode? Real / Protection Mode?

l/O Protection

  • All I/O instructions are privileged instructions
  • Must ensure that a user program could never gain control of the computer in kernel mode (I.e., a user program that, as part of its execution, stores a new address in the interrupt vector)

../res/Pasted image 20240229153004.png Use of A System Call to Perform I/O

Memory Protection

  • Must provide memory protection at least for the interrupt vector and the interrupt service routines
  • In order to have memory protection, at a minimum add two registers that determine the range of legal addresses a program may access:
    • Base register - holds the smallest legal physical memory address
    • Limit register - contains the size of the range
    • User can only access address ranging Base + Limit
  • Memory outside the defined range is protected

../res/Pasted image 20240229153238.png 300040+120900=420940

Hardware Address Protection

../res/Pasted image 20240229153306.png

Hardware Protection

  • When executing in kernel mode, the operating system has unrestricted access to both kernel and user's memory
  • The load instructions for the base and limit registers are privileged instructions

CPU Protection

  • Timer - interrupts computer after specified period to ensure operating system maintains control (or when to maintain control)
    • Timer is decremented every clock tick
    • When timer reaches the value 0 , an interrupt occurs
    • Prevent any process to use CPU resource infinitely
  • Timer commonly used to implement time sharing
  • Timer also used to compute the current time
  • Load-timer is a privileged instruction